Digital IC Design masters level CPD Module Training
Deadline
24 Aug
24 Aug 2026
Deadline
24 Aug
MIDAS Skillnet seeks a provider for a 12-week online CPD module in Digital IC Design for electronics engineers in Ireland.
Online CPD module in Digital IC Design for electronics industry engineers in Ireland
Bidder profile
Suitable for training providers or Higher Education Institutions with expertise in digital IC design and online adult education, capable of delivering accredited or certified courses.
Risks & flags
- Potential for re-runs up to 36 months
- Certification requirements (NFQ/QQI for HEIs)
- Specific content coverage required
Briefing
AI-generated analysis of the documents. Check the official notice and any amendments for current submission details.
1. At a glance
| Buyer | MIDAS Electronic Systems Skillnet |
|---|---|
| Title | Digital IC Design masters level CPD Module Training |
| CPV / category | Not specified |
| Estimated value | Not disclosed |
| Per-year | Not specified |
| Procedure type | Not specified |
| Lots | Not specified |
| Location | Ireland |
| Contract length | Initial 12 weeks, with potential for re-runs up to 36 months |
| Submission deadline | 2026-08-24T10:00:00+00:00 |
| Go-live / start | September - December 2026 (preferred) |
2. Scope of Work
The contract requires a single provider to deliver a live online, part-time Continuous Professional Development (CPD) module in Digital IC Design. The module is intended for engineers employed full-time in Ireland's electronics industry, aiming to upskill them in digital IC design. The training will include theory, practical assignments, and assessment, leading to certification.
Key components of the service include:
- Course Structure and Content: Development and delivery of a 12-week online course. The content should cover digital design topics similar to, but not identical to, a provided list. This list includes:
- Introduction to Basic Verilog Modelling
- Verilog Coding of Finite State Machines
- Coding of a basic functional testbench
- Test Specifications and Testing Silicon (Functional testing, BIST, SCAN, production testing)
- Description of Verification Methodologies (including UVM)
- Introduction to Finite State Machines and applications (UART, Memory Controller design)
- Introduction to Top Down Design Methodology
- ARM and AMBA, APB, AHBLite and AXI4 buses
- Static Timing Analysis (STA)
- FSM synchronization methods
- Metastability and Reliability
- Asynchronous interfaces
- Design of a simple Microprocessor or similar project
- Overview of FPGAs architecture
- Delivery Method: Live online, part-time. The course duration is 12 weeks, with participants expected to commit up to 10 hours per week. This comprises 2 to 3 hours of lectures and up to 7 hours of project work per week.
- Participants: Entry-level digital IC designers, including recent Level 8 graduates with 1-2 years of experience, or experienced engineers upskilling in new technical areas.
- Certification: If delivered by a Higher Education Institution (HEI), the course should be certified at an appropriate level on the National Framework for Qualifications (NFQ), ideally resulting in a Special Purpose Award or Minor Award in Digital Design at postgraduate level. Commercial training providers should use a recognised company certificate and/or a relevant QQI award. Pass/fail results for each trainee must be provided to MIDAS Skillnet.
- Trainer Profile: The proposed trainer must have relevant qualifications and prior training experience in delivering similar programmes. Testimonials are beneficial.
- Course Materials: Providers must state if materials will be provided in soft or hard copy format and include any associated printing and delivery costs in the quoted price.
- Participant Numbers: The preferred course run is for September to December 2026. The Skillnet anticipates filling classes with up to 20 (or 22) attendees. Bidders must indicate their maximum permitted number of attendees and a recommended number for an improved training experience.
- Re-runs: Potential for re-runs within 24 months, contingent on demand and budget, extendable to 36 months by mutual agreement. A quote per re-run is required as an optional extra.
3. Background & buyer context
MIDAS Electronic Systems Skillnet operates as an activity of MIDAS Ireland, funded by member companies and Skillnet Ireland. Skillnet Ireland is in turn funded by the National Training Fund through the Department of Further and Higher Education, Research, Innovation and Science. MIDAS is an industry-led cluster focused on developing Ireland's microelectronics and electronic systems sector. The Skillnet initiative specifically aims to address the mutual training needs of Semiconductor & Electronic Systems companies based in Ireland, providing cost-effective, locally held training for skilled employees. This tender seeks to upskill engineers to improve productivity within these member companies.
4. Eligibility & selection criteria
Bidders must meet the following minimum requirements to be considered:
- Turnover requirement: Not specified for this tender.
- Insurance:
- Public Liability cover: €5M minimum
- Professional Indemnity cover: €1M minimum
- Certifications: Not specified for this tender.
- Past experience: Not specified for this tender.
- Personnel: Not specified for this tender.
- Geographic / facility constraints: Not specified for this tender, beyond the requirement for live online delivery.
5. Award criteria & scoring
Criterion Weight (%) Sub-criteria
Can you bid?
Public liability insurance
€5,000,000
Professional indemnity insurance
€1,000,000
Named standards / methodologies
Documents (1)
Call for Tenders MIDAS Skillnet Digital IC Design CPD Module.pdf
638.6 KB · RFT / Invitation to Tender
Original notice text
Digital IC Design CPD Module Training at masters level for integrated circuit design engineers
AI analysis updated 3 weeks, 3 days ago
Deadline
24 Aug
Location
Ireland
Procedure
Open
Clarification
24 Aug 2026
eTenders ID
8834375
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